Using External Interrupt of LPC2148

Using External Interrupt of LPC2148

Theory

An interrupt is a signal to the processor emitted by hardware or software indicating an event that needs immediate attention.

An interrupt vector is the memory address of an interrupt handler, or an index into an array called an interrupt vector table that contains the memory addresses of interrupt handlers. When aninterrupt is generated, the processor saves its execution state via a context switch, and begins execution of the interrupt handler at the interrupt vector.

External Interrupt Register
External Interrupt Flag register (EXTINT)

When a pin is selected for its external interrupt function, the level or edge on that pin (selected by its bits in the EXTPOLAR and EXTMODE registers) will set its interrupt flag in this register. This asserts the corresponding interrupt request to the VIC, which will cause an interrupt if interrupts from the pin are enabled.

Writing ones to bits EINT0 through EINT3 in EXTINT register clears the corresponding bits. In level-sensitive mode this action is efficacious only when the pin is in its inactive state.

Once a bit from EINT0 to EINT3 is set and an appropriate code starts to execute (handling wakeup and/or external interrupt), this bit in EXTINT register must be cleared. Otherwise the event that was just triggered by activity on the EINT pin will not be recognized in the future.

External Interrupt Mode register (EXTMODE )

The bits in this register select whether each EINT pin is level- or edge-sensitive. Only pins that are selected for the EINT function and enabled via the VICIntEnable register can cause interrupts from the External Interrupt function (though of course pins selected for other functions may cause interrupts from those functions).

External Interrupt Polarity register (EXTPOLAR)

In level-sensitive mode, the bits in this register select whether the corresponding pin is high- or low-active. In edge-sensitive mode, they select whether the pin is rising- or falling-edge sensitive. Only pins that are selected for the EINT function (see “Pin Connect Block” chapter on page 58) and enabled in the VICIntEnable can cause interrupts from the External Interrupt function (though of course pins selected for other functions may cause interrupts from those functions).

Vectored Interrupt Controller (VIC)

Vectored Interrupt Controller (VIC) takes 32 interrupt request inputs andprogrammably assigns them into 3 categories, FIQ, vectored IRQ, and non-vectored IRQ.The programmable assignment scheme means that priorities of interrupts from thevarious peripherals can be dynamically assigned and adjusted.

Interrupt Enable register (VICIntEnable)

This is a read/write accessible register. This register controls which of the 32 interrupt requests andsoftware interrupts contribute to FIQ or IRQ.

Interrupt Select register (VICIntSelect)

This is a read/write accessible register. This register classifies each of the 32 interruptrequests as contributing to FIQ or IRQ.

Vector Control registers 0-15 (VICVectCntl0-15)

These are a read/write accessible registers. Each of these registers controls one of the 16 vectored IRQ slots. Slot 0 has the highest priority and slot 15 the lowest. Note that disabling a vectored IRQ slot in one of the VICVectCntl registers does not disable the interrupt itself, the interrupt is simply changed to the non-vectored form.

Vector Address registers 0-15 (VICVectAddr0-15)

These are a read/write accessible registers. These registers hold the addresses of the Interrupt Service routines (ISRs) for the 16 vectored IRQ slots.

Vector Address register (VICVectAddr)

This is a read/write accessible register. When an IRQ interrupt occurs, the IRQ service routine can read this register and jump to the value read.

Initialization of interrupt

To initialize the interrupt we configure the following registers

EXTINT = 0x00;
EXTMODE = 0x02;
EXTPOLAR = 0x02; //Falling Edge Sensitive
PINSEL0 = 0x20000000; //Enable EINT1 on P0.14
VICVectCntl0 = 0x20 | 0x0e; //15 is index of EINT1
VICVectAddr0 = (unsigned int)ExtInt_Buzzer;
VICIntEnable |= 1<<15; //Enable EINT1
VICIntSelect=0X00000000;

The above code segment initializes the External interrupt 1 of the LPC2148 MCU.

interrupt

Configuration of Pin connect Block to select ENT1 function of and External Interrupt and GPIO register for P0.7 for Buzzer

PINSEL0 = 0x20000000; //Enable EINT1 on P0.14
IO0DIR=0x000000f0;// Comand to set PIN0.7 as output port.

Function to Initialize Interrupt

 void ExtInt_Init(void)
   {  EXTINT  =  0x00;
   EXTMODE  = 0x02; 
   EXTPOLAR = 0x02;          //Falling Edge Sensitive
   VICVectCntl0 = 0x20 | 0x0e; //15 is index of EINT1
   VICVectAddr0 = (unsigned int)ExtInt_Buzzer;
   VICIntEnable |= 1<<15;    //Enable EINT1
   VICIntSelect=0X00000000;
 }

Interrupt Service routine for EXT1

Any function name with the interrupt type written after two consecutive ‘_’ underscores is recognized by the compiler as the interrupt service routine. Following is the code segment of the interrupt service routine whenever the ENT1 is raised in PIN0.14.

void ExtInt_Buzzer(void)__irq
   {
   EXTINT = 0x02;
   if(i==0)
   {IO0CLR = 0x00000080;
   IO1SET = 0xcccccccc;
   i=1;
   }
   else
   {IO0SET = 0x00000080;
   IO1CLR = 0xcccccccc;
   i=0;
   }
   VICVectAddr=0x00000000;
   }

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